Abstract

Device size is getting smaller nowadays, which make it a limiting factor for the device’s performance. There are several carrier transport models, but the most popular model is drift-diffusion transport model. Quantum effects has become more important and need to be calculated when device’s size gets smaller. Several models, that taking account of quantum effects, have put boundaries in order to simplify calculation so that it makes inaccurate modeling (Vexler M. I, et al., 2001, Ranuarez J C, et al., 2006).

Most analytical formulation of tunneling current in Metal-Oxide-Semiconductor (MOS) structure assumes that longitudinal and transversal components of electron movement are uncoupled. Electron transport becomes ballistic when device’s size gets smaller. Coupling effects between longitudinal and transversal components of electron movement cannot be ignored when electron velocity is higher than thermal injection velocity (Mao, 2007). Besides, semiconductor is considered as an isotropic (Clerc R, et al., 2002, Mao, 2007). Silicon semiconductor is indirect bandgap material, so has to be treated as anisotropic material (Rahman A, 2005).

When positive or negative bias is applied to ideal MOS capacitor, basically there are three possible cases of what happed to the surface of the semiconductor, accumulation, depletion, and inversion [Sze S.M et al., 2007]. In this research, we calculated tunneling current for accumulation case.

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